1. Field of Invention
The present invention is directed generally to the field of electronic amplifiers, and particularly to distributed amplifiers (DA) for use in power output stages and/or receiving part of RF (Radio Frequency) communication products.
2. Description of Related Art
In communication systems such as RF transceivers, it is desirable to integrate as much circuitry as possible on a single semiconductor chip. The main function blocks in the RF transceivers are Low Noise Amplifier (LNA) in the receiver part and Power Amplifier (PA) in the transmitter part. However, it challenges to design the 2 block circuits because of wide bandwidth, low noise, high gain, and low power consumption.
This has not been practical for most such products because of the power requirements associated with the transmitter's power output stage (sometimes referred to herein as a power amplifier) and low noise requirements associated with the receiver's low noise amplifier (LNA). Consequently, they have usually been constructed as an off-chip, discrete LNA or PA.
From monolithic microwave IC (MMIC) to currently CMOS (Complimentary Metal Oxide Semiconductor) RFIC design, the evolution of circuit design proofed that Distributed Amplifier (DA) circuit plays an important rule more and more, no matter in receiver part as LNA or in transmitter part as PA, especially in CMOS technology. The DA structure has been used successfully in the RF front-end applications.
A prior art distributed amplifier (DA) 100 is shown in FIG. 1. The prior DA 100 includes an input transmission line 110, an output transmission line 120, and multiple transistor stages 130 that couple the transmission lines 110 and 120 together by the transconductance of the transistor stages 130.
The input transmission line 110 includes inductors 111 at the beginning and end of the transmission line 110, and a series of inductors 112 connected between the inductors 111. The input transmission line 110 is terminated by a resistance 146 of 50 ohms, with an RF bypass capacitor 147 coupled between the resistance 146 and ground. The output transmission line 120 includes an inductor 121 at each end of the transmission line, and a series of inductances 122 connected between inductances 121. The value of inductors 121 is equal to the value of inductors 111, and the value of inductors 122 is equal to the value of inductors 112.
The power supply Vdd is coupled to the transmission line 120 by an RF choke 141. The termination for the output transmission line 120 is provided by a 50 ohm resistance 144, with an RF bypass capacitor 145 coupled between the resistance 144 and ground.
The input transmission line 110 is coupled to the output transmission line 120 by the transconductance of N stages of transistors 130. The gate of each transistor is coupled to a junction between adjacent inductors in the input transmission line 110. The source of each transistor is grounded, with its drain coupled to a junction between adjacent inductors in the output transmission line 120.
Bias for the transistor stages 130 is provided by a current source 149 coupled in series with the drain of a transistor 150. With the drain of the transistor 150 coupled to its gates, and the gate of the transistor 150 coupled to the input transmission line 110 through an isolating resistance 148, equal bias currents are established in each of the transistor stages 130. That bias current is substantially equal to the current supplied by the current source 149.
The gate and drain capacitances of the transistors 130 are absorbed into the inductors 111, 112, 121, and 122, thereby forming artificial transmission lines. When an input signal is applied to the amplifier's input terminal 142, the signal travels down the transmission line 110 to the terminating resistance 146 which absorbs the signal, thereby preventing any signal reflection. As the input signal travels down the input transmission line, each transistor 130 becomes excited by the traveling signal and transfers the signal to the output transmission line through its transconductance. The signals output by the transistors 130 are summed at an output terminal 143. Any signal that propagates in the opposite direction is absorbed by the resistance 144.
Most prior DA circuits are built with simply one NMOS common source inverter structure with extra internal or external bias circuit and even the matching circuits are tuned by external components. This caused the noise figure and poor linearity.